by : Christophe CatessonThere are two big categories of random access memories:
* Dynamic memories (DRAM, Dynamic Random Access Module), not very costly. They are in most cases used for the central memory of the computer
* Static memories (SRAM, Static Random Access Module), quick and expensive. SRAM is notably used for cache memories of the processor
Functioning of the random access memory
The random access memory is constituted of hundred of thousand small condensers storing charges. When it is loaded, the logical state of the condenser is equal to 1, otherwise it belongs to 0, what means that every condenser represents one bit of memory.
Given that condensers off-load, it is always necessary to recharge them in a space of regular time called cycle of refreshment. Memory DRAM requires cycles of refreshment for instance (Ns) is about 15 nanoseconds.
Every condenser is coupled with a transistor allowing to "recover « or to change the state of the condenser. These transistors are lined up in form of matrix, that is they achieve a hut memory (so called memory) by a line and a column.
So, for a memory of type DRAM, the time of access is of 60 nanoseconds (35ns of delay of cycle and 25 ns of time of latency). On a computer, the time of cycle corresponds contrary to the frequency of the clock, for instance for a computer pulsated in 200 MHz, the time of cycle is 5 ns (1 / (200*106)).
As a result a computer having a frequency well brought up and using memories the time of access of which is much longer than the time of cycle of the processor must perform cycles of wait to access to the memory. In the case of a computer pulsated in 200 MHz using memories of types DRAM (which the time of access is of 60ns), there are 11 cycles of wait as a cycle of transfer. The performances of the computer are of as much diminished as there are cycles
Formats of Random Access Memory (RAM)
There are numerous types of random access memories. These all come in the form of barrettes of memory attachable on the motherboard.
* SIMM (Single Inline Memory Module): it is about printed circuits among which one of the faces has fleas of memory. There are two types of barrettes SIMM, according to the number of connector cables (30 or 72)
* DIMM (Dual Inline Memory Modulates) are from memories 64 bits, what explains why it is not necessary to match them. Barrettes DIMM have fleas of memory on both sides of printed circuit and have also 84 connector cables on each side, what endows them with a total of 168 brooches. They have bigger dimensions than barrettes SIMM (130x25mm).
* RIMM (Rambus Inline Memory Module, conscripts also RD-RAM or DRD-RAM) are from memories 64 bits developed by the society Rambus. They have 184 brooches. These barrettes have two notches of location (détrompeurs), avoiding very risk of confusion with the previous modules. Considering their well brought up speed of transfer, barrettes RIMM have a thermal film made responsible for ameliorating the clearing up of warmth. As in the case of DIMM, there are modules of smaller size, called SO RIMM (Small Outline RIMM), intended for laptop computers. Barrettes SO RIMM include only 160 brooches.
* DRAM (Dynamic RAM, dynamic RAM) is the type of memo most spread at the beginning of the millennium. It is about a memory from which transistors are lined up in a matrix according to lines and of columns. A transistor, coupled with a condenser gives the information of a bit. 1 byte consisting of 8 bits, a barrette of memory 256 Mb DRAM will contain 256 therefore * 2^10 * 2^10 = 256 * on 1024 * on 1024 = 268 435 456 bytes = 268 435 456 * 8 = 2 147 483 648 bits = 2 147 483 648 transistors. A 256 Mb barrette has so in reality a capacity of 268 435 456 bytes, that is 268 Mb! These are memories from which the time of access is 60 ns. On the other hand, accesses memory are made in general on data lined up consecutively in memory. So the mode of access in gust (burst mode) allows to achieve the three successive data in the first one without time of additional latency.
* DRAM FPM to speed up accesses to DRAM, there is a technology, called pagination consisting in achieving data located on the same column by changing the address of the line only, what allows to avoid the repetition of the number of column between the reading of each of the lines. They speak then about DRAM FPM (Fast Page Mode). FPM allows to acquire time of access in the order of 70 - 80 nanoseconds for a frequency of functioning that can go from 25 to 33 Mhz.
* DRAM EDO (Extended Data Out, Goes out of data ameliorated sometimes also called "hyper-page") appears in 1995. The technology used with this type of memory consists in addressing the following column during the reading of the data of a column. It creates an overlapping of accesses allowing to save time on every cycle. The time of access to memory EDO is therefore about 50 - 60 nanoseconds for a frequency of functioning going 33 - 66 Mhz. So, RAM EDO, when it is used in mode gust allows to acquire cycles of form 5-2-2-2, that is a benefit of 4 cycles on the access to 4 data. As much as memory EDO did not accept the upper frequencies in 66 Mhz, it disappeared in aid of SDRAM.
* SDRAM (Synchronous DRAM, translate synchronous RAM), appeared in 1997, allows a reading of data synchronized with the bus of the card-mother, contrary to memories EDO and FPM (qualified as asynchronous) having their own clock. SDRAM allows therefore to free itself from time of wait owed to synchronization with the card-mother. This one allows to acquire a cycle in mode gust of form 5-1-1-1, that is to say benefit of 3 cycles in comparison with RAM EDO. In that way SDRAM is able of working with a cadenza going until 150 Mhz, allowing him to acquire from time of access about 10 ns.
* DR-SDRAM (Direct Rambus DRAM or else RDRAM) is a type of memory allowing to transfer data on a bus of 16 wide bits to a cadenza of 800Mhz, what confers on him a band passer-by of 1,6 Go / s. As SDRAM, this type of memory is synchronized with the clock of the bus to ameliorate exchanges of data.
* DDR-SDRAM (Double Dated Miss SDRAM) is a memory based on technology SDRAM, allowing to double the rate of transfer of SDRAM with equal frequency. Reading or writing of data in memory am accomplished on the basis of a clock. Standard memory DRAM uses a method conscript SDR (Single Data Fails) consisting in reading or writing data in every forehead going up. DDR allows to double the frequency of reading / writings, with a clock pulsated in the same frequency, by sending data in every forehead going up, as well as in every downward forehead. Memory DDR has in general a commercial appellation of type PCXXXX where "XXXX " represent the debit side in Mb / s.
* DDR2 (or DDR-II) allows to attain twice as well brought up debit sides as DDR with equal external frequency. They speak about QDR (Quadruple Dated Fail or quad-pumped) to indicate the method of reading and used writing. Memory DDR2 uses in effect two channels separated for reading and for writing, so it is able of sending or of accepting twice more data than DDR.
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